Physical Design Engineer – Ampere

Website Ampere

DescriptionThe Role

As part of the Physical Design team at Ampere, you will be responsible for ASIC physical design and implementation on our cutting edge ARMv8 based server on chip solutions that will be the backbone of future data centers. You will be interacting on a daily basis with our design team worldwide and will work on the latest technology nodes available in the industry. You will have an opportunity to work collaboratively with, and learn from industry veteran designers and architects to create a breakthrough design for cloud computing. Our Physical Design Engineer will work with multi-functional global teams to implement Partition/Block level Constraint development, Synthesis, Floorplan, Place and Route, Timing closure, LEC, IR/EM and DRC/LVS closure for our next generation highly complex 5nm/7nm/advanced-node Server class Processor products.

What The Physical Design Team Wants You To Know

Being a Physical Design Engineer at Ampere® is interesting, challenging, and will expand your professional breadth. You will learn how a world-class design team develop their microprocessor using Ampere® Arm®-based platform plus our in-house and 3rd party IP portfolio. Also you will understand pressure of being the leader team in the market, that push us to solve technical problems, and deliver product on time. The experience at Ampere® that you will possess will be valuable for your career path.

What You Will Do  

  • Responsible for all aspect of physical design from RTL to GDS on sub-micron node, 16nm or lower
  • Develop physical design methodologies, flow customization/automation, synthesis, LEC, floor-planning, power/clock distribution, IP block assembly, place & route, and timing closure
  • Implement top-level partitioning, chip integration, and assemble
  • Work with packaging, power-grid designer to plan on bumps, power-grid distribution for multiple domains at the chip-level
  • Implement chip-level routing, power-planning, and timing closure
  • Perform power and noise analysis, RC extraction, LEC and physical verification at the block and chip-level

What You Will Bring

  • Min 5+ years of hand-on physical design experience from netlist to GDS on sub-micron node 28nm or lower
  • Hand-on experience with Cadence or Synopsys physical implementation tool and Calibre DRC/LVS physical verification tool
  • Experience with floor-plan trade off, placement and routing approaches, pre- and post-silicon ECO, timing closure, congestion resolution, IR-drop and crosstalk reduction techniques
  • Experience with high-speed Clock Tree Synthesis, topology and trade off
  • Experience with signal integrity effect and solution
  • Experience with constraint debug, timing closure are plus
  • Experience with FinFET technology is a plus
  • Good communication and teamwork skills
  • Good English communications skills, both verbal and writing

Education

  • BS/MS/Ph.D in Electronic/Physic/Computer Engineering/Computer Science or a related field.

About Ampere

Ampere is designing the future of hyperscale cloud and edge computing with the world’s first cloud native processor. Built for the cloud with a modern 64-bit Arm server-based architecture, Ampere gives customers the freedom to accelerate the delivery of all cloud computing applications. With industry-leading cloud performance, power efficiency and scalability, Ampere processors are tailored for the continued growth of cloud and edge computing.

Our Story

Like the scientist behind its name, Ampere employees are innovators. We understand the needs of cloud computing and different software requirements. We are inventing what comes next and looking at everything from the structure of memory and how efficient the system is, to considerations on speed, cost of electricity and ability to cool. Power, size, weight and cost are driving the technology requirements and the innovation to come. Our world class team of engineers, with depth and expertise in the cloud and semiconductor industries, is not only focused on the development of new semiconductor designs but also building out the first software ecosystem for Arm®-based server processors. Through the Ampere approach to the cloud and edge, we give our customers the freedom to challenge the status quo and accelerate next-generation data centers for the most memory-intensive applications. Given the challenge we have outlined, we are building a culture of entrepreneurs that ensure customers come first, proactively approaching industry challenges in the areas of security, power and performance, delivering results that matter most. We are an inclusive and equal opportunity employer. All applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability status, protected veteran status, or any other characteristic protected by law.

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